a. Field of the Invention
The present invention relates to a structure for a high density wiring board useful in computers, communication equipment or the like.
b. Description of the Related Art
The conventional structure of a wiring board with insulation layers is shown in FIG. 2A. In the conventional structure, as depicted in the drawing, an organic insulation layer 2 and a conductor 4, which have been subjected to patterning, are laminated on a substrate 1, and another organic insulation layer 2a having holes therein, another conductor 4a to which patterning has been applied, and a further organic layer 2b are laminated further on the organic insulation layer 2 and the conductor 4.
When circuits are formed in multiple layers, the above structure however involves the problem that cracks 7 are formed as illustrated in FIG. 2B. In the step in which the upper conductive layer 4a or the middle organic insulation layer 2a are formed, shape-attributed large stress 6 may often be applied to the underlying conductor, the insulation layer and the like in the directions as indicated by arrows 12 in FIG. 2B. As a result, cracks may be formed at the areas of bonding between pattern edge portions 13 and 14 of the respective conductive layers and their associated underlying layers. The cracks 7 may be formed in layers such as the organic insulation layers 2 and 2a and the conductive layer 4 as indicated in FIG. 2B.
When such a crack 7 is formed in the conductive layer 4 or the organic insulation layers 2 and 2a, the state of contact at the cracked portion varies upon passing a current or under vibrations so that noise may be generated or disconnection may take place. This may lead to problems such as the fabrication yield being reduced and the product reliability being lowered.
As a means for overcoming the above problems, a technique has been disclosed in Japanese Patent Laid-Open No. 61-12357. The structure of a wiring board according to the above technique is shown in FIG. 3. The wiring board according to this conventional technique has the structure that a stress supportable layer 5 made of Ta.sub.2 O.sub.5 or SiO.sub.2 is provided between an organic insulation layer 2 and a conductive layer 4. An additional stress supportable layer 5a is also interposed between another organic insulation layer 2a and another conductive layer 4a. These stress supportable layers 5 and 5a make it possible to withstand thermal stress produced during the steps in which insulation layers are to be formed on the stress supportable layers 5 and 5a respectively.
The stress supportable layers according to the conventional technique are effective as layers for withstanding thermal stress. The conventional technique is however accompanied by the following problem. Such a wiring board may internally give off heat when a current of electricity is fed to the board. No consideration whatsoever is however taken for such heat in the above conventional technique.
Referring back to FIG. 3, a description will be made of a case in which such heat has been produced. In FIG. 3, the stress supportable layer 5 is provided between the organic insulation layer 2 and the conductive layer 4, both of which are formed on a substrate 1. Further, the stress supportable layer 5a is provided between the organic insulation layer 2a and the conductive layer 4a.
These stress supportable layers 5 and 5a can withstand thermal stress to be produced in the steps in which overlying insulation layers will be formed respectively. However, no consideration is made for the diffusion of heat to be produced during feeding of electrical power to the substrate. Due to localized generation of heat in the course of the feeding of the electrical power, heat will be accumulated in the stress supportable layers 5 and 5a and organic insulation layers 2 and 2a so that the temperature of these layers will arise. As a result, these layers will develop a thermal expansion as indicated at numeral 11. Due to a difference in the coefficient of thermal expansion between these layers, cracks and separation occur in the stress supportable layer 5. In addition, cracks and the like also take place in the conductive layer 4. They are indicated as cracks 7 in FIG. 3.
Therefore, the wiring board described above would have low reliability. Further, a product making use of this wiring board, such as a computer, is prone to trouble or malfunction.